The present invention relates in general to tristate output circuits and in particular to a tristate output circuit having selectable output impedance.
The output stage of a logic or a pulse circuit typically comprises an amplifier or switching circuit that provides an output to a load, and one of the more important features thereof is its output impedance. For example, in many applications a relatively high output impedance is desired. On the other hand, when an output circuit supplies a signal to a constant impedance transmission line, it may be preferable that its output impedance match the impedance of the transmission line so that it back terminates the line for absorbing reflections.
A tristate output circuit has two modes of operation. In a normal mode of operation, it acts as a conventional output stage providing a signal to a load through its output impedance. In the tristate mode of operation, no output signal is produced and the output impedance is "disconnected" in some fashion from external circuitry so that it does not act as a load. Tristate circuits are often used to multiplex signals onto a bus and when an output signal from one tristate output circuit is currently driving the bus, other output circuits connected to the bus may be "tristated" so that their output impedances do not act as loads to the circuit driving the bus. Use of tristate output circuits in such applications minimizes the amount of power that each output circuit must provide in order to drive the transmission line. Tristate output circuits of the prior art typically include transmission gates in their output signal paths for selectively disconnecting their output terminals from external loads. However, capacitance and resistance associated with these transmission gates tend to distort, attenuate and filter the output signals and limit the ability of the tristate output circuit effectively to back terminate a transmission line.